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Single Byte Error Correcting—Double Byte Error Detecting Codes for Memory Systems

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2 Author(s)
Kaneda, S. ; Musashino Electrical Communication Laboratory, Nippon Telegraph and Telephone Public Corporation ; Fujiwara, E.

In a memory that uses byte-organized memory chips, each containing b (≥2) output bits, a single chip failure is likely to affect many bits within a byte. Single byte error correcting–double byte error detecting codes (SbEC–DbED codes) are used in this kind of memory system to increase reliability.

Published in:

Computers, IEEE Transactions on  (Volume:C-31 ,  Issue: 7 )