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The Prime Memory System for Array Access

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2 Author(s)
Lawrie, Duncan H. ; Department of Computer Science, University of Illinois ; Vora, C.R.

In this paper we describe a memory system designed for parallel array access. The system is based on the use of a prime nwnber of memories and a powerful combination of indexing hardware and data alignment switches. Particular emphasis is placed on the indexing equations and their implementation.

Published in:

Computers, IEEE Transactions on  (Volume:C-31 ,  Issue: 5 )