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Analysis of Multiprocessors with Private Cache Memories

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1 Author(s)
Patel, J.H. ; Department of Electrical Engineering and the Coordinated Science Laboratory, University of Illinois

This paper presents an approximate analytical model for the performance of multiprocessors with private cache memories and a single shared main memory. The accuracy of the model is compared with simulation results and is found to be very good over a broad range of parameters. The parameters of the model are the size of the multiprocessor, the size and type of the interconnection network, the cache miss-ratio, and the cache block transfer time. The analysis is extended to include several different read/write policies such as write-through, load-through, and buffered write-back. The analytical technique presented is also applicable to the performance of interconnection networks under block transfer mode.

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Computers, IEEE Transactions on  (Volume:C-31 ,  Issue: 4 )