A Comparison of Universal-Logic-Module Realizations and Their Application in the Synthesis of Combinatorial and Sequential Logic Networks

This paper surveys the six possible variants of the basic universal-logic-module, ULM.2, and considers possible circuit realizations for each. A comparison of these variants in terms of circuit complexity, propagation delay, and total number of input/output connections is pursued, and detailed statistics generated to compare with previously published optimum data using conventional NAND and NOR gates.