By Topic

An Information Theoretic Approach to Digital Fault Testing

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Agrawal, V.D. ; Bell Laboratories

The concepts of information theory are applied to the problem of testing digital circuits. By analyzing the information throughput of the circuit an expression for the probability of detecting a hardware fault is derived. Examples are given to illustrate an application of the present study in designing efficient pattern generators for testing.

Published in:

Computers, IEEE Transactions on  (Volume:C-30 ,  Issue: 8 )