By Topic

Synthesis of Gate-Minimum Multi-Output Two-Level Negative Gate Networks

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Nakamura, K. ; Department of Measurement Engineering, Kobe University of Mercantile Marine

A negative gate is a gate which can realize an arbitrary negative function. The problem of synthesizing logical networks, with negative gates only, is important for the design of MOS LSI.

Published in:

Computers, IEEE Transactions on  (Volume:C-28 ,  Issue: 10 )