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Shift Register Binary Rate Multipliers

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2 Author(s)
Ninke, W.H. ; Bell Laboratories ; Ritchie, G.R.

Novel implementations of a binary rate multiplier (BRM) circuit are described. These BRM's, which use the input data word to load patterns into shift registers, are capable of working at higher speed than a conventional circuit, and should be more suitable for silicon integration. Long input data words can be accommodated with a long shift register or by interconnecting several short registers.

Published in:

Computers, IEEE Transactions on  (Volume:C-26 ,  Issue: 3 )