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An Incremental Computer

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2 Author(s)
H. Brafmen ; Stanford Linear Accelerator, Stanford University ; B. J. Reuter

The article describes a variable high-speed incremental computer that adopts the basic concept underlying a digital differential analyzer (DDA). Its structure closely resembles that of a microprocessor and includes the following features: floating-point arithmetic, a word-length transfer with the elimination of a residue (R) register, multibit multiplication, and a flexible software scheme of interconnections that includes the use of a stack to avoid redundant operations. The proposed structure has been simulated by solving a variety of differential equations with distinctly accurate results.

Published in:

IEEE Transactions on Computers  (Volume:C-26 ,  Issue: 11 )