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Processor Testability and Design Consequences

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3 Author(s)
C. Robach ; ENSIMAG, University of Grenoble ; G. Saucier ; J. Lebrun

Our purpose is to define a methodology for writing (micro) programs to test CPU's for which no or few test facilities are available.

Published in:

IEEE Transactions on Computers  (Volume:C-25 ,  Issue: 6 )