Referenced Items are not available for this document.
A novel strategy for the logic synthesis of asynchronous control circuits is presented. It is based on the structural theory of Petri nets and integer linear programming. Techniques that are capable of checking implementability conditions, such as complete state coding, and deriving a gate netlist to implement the specified behavior are presented. These techniques can handle Petri net specifications consisting of several thousands of transitions and provide a significant speed-up compared with techniques that have previously been proposed
Published in:
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
(Volume:25
,
Issue:
9
)
Date of Publication: Sept. 2006
- Page(s):
- 1637 - 1651
- ISSN :
- 0278-0070
- INSPEC Accession Number:
- 9037704
- Digital Object Identifier :
- 10.1109/TCAD.2005.859516
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 14 August 2006
- Issue Date :
- Sept. 2006
- Sponsored by :
- IEEE Council on Electronic Design Automation
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