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Analysis of Logic Circuits with Faults Using Input Signal Probabilities

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2 Author(s)
Parker, K.P. ; Digital Systems Laboratory, Stanford University ; McCluskey, E.J.

A probabilistic treatment of general combinational networks has been developed. Using the notions of the probability of a signal and signal independence, algorithms have been presented to calculate the probability of the output of a logic circuit being 1. Simplifications to the algorithm result when sets of input probabilities are given the same value, and this process called bundling is described in the paper. Finally, a series of examples illustrate the application of the probabilistic approach to the analysis of faulty logic circuits.

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Computers, IEEE Transactions on  (Volume:C-24 ,  Issue: 5 )