Application of Uniform Loading Theory to Circuit Packaging and Memory Arrays in High-Speed Computers

The uniform loading theory [1] has been approximated and used to analyze a class of interconnection problems usually encountered in the design of high-speed circuit packaging and memory arrays in today's computers. The uniform loads are, for example, IC gates and via holes on multilayered printed circuit board and cross-coupling capacitance in memory arrays. They are treated as discrete loads along smooth transmission lines. The input and output transfer function, impulse response, unit step response, and propagation delay are calculated. To a first-order approximation, the pure resistive loaded line impedance and voltage reflection coefficient can be easily derived. Matching conditions and some experimental results are included. Oscillation due to second-order effects is also discussed.