By Topic

A Transform for NAND Network Design

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Hsiao-Peng Lee ; Department of Electrical Engineering, Stanford University ; E. S. Davidson

A transform that operates on the interconnection topology of a NAND network is presented. The output connecting a designated gate to the network is deleted and is connected instead to a number of other gates in the network. The entire transform may be specified by designating a "transformed gate" and a "modified gate." The new connections are made and the resulting network is then simplified logically by casting out redundancy and merging gates in the network.

Published in:

IEEE Transactions on Computers  (Volume:C-21 ,  Issue: 1 )