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On the Performance of Interleaved Memories with Multiple-Word Bandwidths

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3 Author(s)

Past studies of the performance of interleaved memory systems are extended in this note by adopting a more general model. The model assumes a system of N memory modules, each of which is made up of b submodules. Successive memory addresses are assigned to sequential submodules, modulo Nb. For increased effective memory bandwidth a so-called conflict buffer of size L + 1 is assumed to exist for storing address conflicts.

Published in:

Computers, IEEE Transactions on  (Volume:C-20 ,  Issue: 12 )

Date of Publication:

Dec. 1971

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