Referenced Items are not available for this document.
Two procedures are presented for generating fault detection test sequences for large sequential circuits. In the adaptive random procedure one can achieve a tradeoff between test generation time, length, and percent of circuit tested. An algorithmic path-sensitizing procedure is also presented. Both procedures employ a three-valued logic system. Some experimental results are given.
Published in:
Computers, IEEE Transactions on
(Volume:C-20
,
Issue:
11
)
Date of Publication: Nov. 1971
- Page(s):
- 1364 - 1370
- ISSN :
- 0018-9340
- Digital Object Identifier :
- 10.1109/T-C.1971.223140
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 14 August 2006
- Issue Date :
- Nov. 1971
- Sponsored by :
- IEEE Computer Society
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