Cart (Loading....) | Create Account
Close category search window
 

Complementary Function Approach to the Synthesis of Three-Level NAND Network

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)

In the present paper efforts have been made to arrive at the three-level NAND network of any general Boolean function by utilizing its complementary function. It has been shown that the knowledge of the complementing gates of the three-level NAND circuit with minimum number of gates in the AND level can readily be obtained from the study of the prime implicants of the complementary function. A reduced form of the Cover and Closure (CC) table is suggested which is applicable in the above three-level NAND network synthesis. The paper also deals with the recognition of the class of functions for which the use of the CC table may be avoided to obtain the same network.

Published in:

Computers, IEEE Transactions on  (Volume:C-19 ,  Issue: 6 )

Date of Publication:

June 1970

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.