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Large-scale integration of adaptive-element building blocks, in a small number of monolithic silicon structures, leads to a degree of freedom and versatility in organizing computing structures that has never before existed. The definition of the function of an adaptive-separation computer is examined, block diagrammed, and repetitive computations are defined. These are then partitioned to define building blocks to be fabricated by large-scale integration (LSI) of arrays of metal-oxide-semiconductor field-effect transistors (MOSFETs) into two basic structures, a serial/parallel multiplier chip and a special-purpose shift register chip. Consideration must be given to the problems of compatibility between these chips and the remainder of the adaptive computer.