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Towards a versatile DRIE: silicon pit structures combined with electrochemical etch stop

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4 Author(s)
Kurzawski, P. ; Phys. Electron. Lab., Eidgenossische Tech. Hochschule, Zurich ; Salo, T. ; Baltes, H. ; Hierlemann, A.

A novel approach for fabricating low-pitch arrays of silicon membranes on standard CMOS wafers by combining deep-reactive ion etching (DRIE) and electrochemical etching (ECE) techniques is presented. These techniques have been used to fabricate membrane-based sensors and sensor arrays featuring different membrane sizes on a single wafer with a well defined etch stop. The described procedure is particularly useful in cases when the usage of SOI wafers is not an option. The combination of a grid-like mask pattern featuring uniform-size etch openings for the DRIE process with a reliable ECE technique allowed to fabricate silicon membranes with sizes ranging from 0.01 mm2 to 2.2 mm2 . The development of this new method has been motivated by the need to design a compact n-well-based calorimetric sensor array, where the use of a standard ECE technique would have significantly increased the overall size of the device

Published in:

Microelectromechanical Systems, Journal of  (Volume:15 ,  Issue: 4 )