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Flexible hardware-friendly digital architecture for 2-D separable convolution-based scaling

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2 Author(s)
F. Cardells-Tormo ; R&D Large Format Technol. Lab., Hewlett-Packard, Barcelona, Spain ; J. Arnabat-Benedicto

There is not a single scaling technique that suits all kind of images. Final image quality (IQ) depends not only on the scale factor but also on the type of image (photo, CAD, Text...) the user is willing to print or display. Formally, any convolution-based scaling operation can be decomposed in three steps: an anti-aliasing filter, image reconstruction by continuous convolution and resampling to the final grid. Based on this formal framework, we propose a flexible hardware-friendly architecture to perform two-dimensional upscaling and downscaling at low hardware cost. In particular, we propose a discrete convolution engine operating a memory that stores a programmable 2-D-separable interpolation kernel. We also state a technique for optimizing the memory size given the kernel and the scale factor. Finally, we describe a novel flexible filter that overcomes aliasing artifacts regardless of image frequency content. The flexibility provided by the combination of the aforementioned elements allows the user to adjust the interpolation kernel and parameters to each specific type of image for IQ improvement.

Published in:

IEEE Transactions on Circuits and Systems II: Express Briefs  (Volume:53 ,  Issue: 7 )