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Massively parallel architectures for large scale neural network simulations

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3 Author(s)
Fujimoto, Y. ; Sharp Corp., Nara, Japan ; Fukuda, N. ; Akabane, T.

A toroidal lattice architecture (TLA) and a planar lattice architecture (PLA) are proposed as massively parallel neurocomputer architectures for large-scale simulations. The performance of these architectures is almost proportional to the number of node processors, and they adopt the most efficient two-dimensional processor connections for WSI implementation. They also give a solution to the connectivity problem, the performance degradation caused by the data transmission bottleneck, and the load balancing problem for efficient parallel processing in large-scale neural network simulations. The general neuron model is defined. Implementation of the TLA with transputers is described. A Hopfield neural network and a multilayer perceptron have been implemented and applied to the traveling salesman problem and to identity mapping, respectively. Proof that the performance increases almost in proportion to the number of node processors is given

Published in:

Neural Networks, IEEE Transactions on  (Volume:3 ,  Issue: 6 )