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An SOI CMOS, high gain and low noise transimpedance-limiting amplifier for 10Gb/s applications

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2 Author(s)
Pera, F. ; Innovative Syst. & Technol. Corp., Kanata, Ont. ; Voinigescu, S.P.

This paper presents a low noise, high gain transimpedance-limiting amplifier (TIALA) design for 10Gb/s applications, implemented in a 0.13mum SOI CMOS technology. Powered from a single 1.5V supply and consuming 165mW, the TIALA features auto-zero DC feedback and has 25muApp input current sensitivity (an estimated -16dBm optical sensitivity) with over 40dB electrical dynamic range and 14 kOhm linear gain

Published in:

Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 IEEE

Date of Conference:

11-13 June 2006