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31-34GHz low noise amplifier with on-chip microstrip lines and inter-stage matching in 90-nm baseline CMOS

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3 Author(s)
Sanduleanu, M.A.T. ; Philips Res., Eindhoven ; Gang Zhang ; Long, J.R.

A Ka band low-noise amplifier in a 90-nm bulk CMOS technology is presented. A thin-film microstrip line with ground sidewalls is used for signal distribution, matching and load resonators. The low-noise amplifier comprises two identical cascode stages, with inter-stage matching as gain boosting. The gain boosting circuit improves the gain by 20% and the noise performance by 27% of the cascode LNA. The proposed amplifier achieves a peak power-gain of 19dB with a 3-dB bandwidth of 31 to 34GHz and a noise figure of 3dB in the middle of the band. No extra process options like MIM capacitors or thick oxide devices are used. The die size is 933 mum by 918 mum and the power consumption is 10mW from a 1.2V (plusmn10%) power supply

Published in:

Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 IEEE

Date of Conference:

11-13 June 2006