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An area-efficient 5-GHz multiple receiver RFIC for MIMO WLAN applications

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2 Author(s)
Khuon, L. ; Massachusetts Inst. of Technol., Cambridge, MA ; Sodini, C.G.

This paper presents area-efficient multiple receivers on a single-chip for 5-GHz MIMO wireless LAN systems. Each receiver has a low noise amplifier, Q-enhanced image reject filter, mixer, and local oscillator amplifier but shares a global local oscillator amplifier and distribution circuits for bias and filter tuning. The receivers are suitable for both spatial diversity and multiplexing. Area-efficiency results from frequency planning, circuit sharing, and application of spatial diversity. One receiver provides 14 dB gain, consumes 25 mA at 1.8 V, and occupies less than 1 mm chip area. The filter has better than 30 dB rejection at the image frequency

Published in:

Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 IEEE

Date of Conference:

11-13 June 2006

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