Referenced Items are not available for this document.
A fault-tolerant array for matrix multiplication that explicitly incorporates mechanisms for easy testability and reconfigurability is described. All signals in the array travel only a constant distance (independent of array size) in any clock cycle. An optimal-time algorithm, designed for multiplying matrices, is described. The algorithm is an efficient simulation of a 2-D systolic algorithm for multiplying matrices.<
Published in:
Computers, IEEE Transactions on
(Volume:38
,
Issue:
2
)
Date of Publication: Feb. 1989
- Page(s):
- 278 - 283
- ISSN :
- 0018-9340
- INSPEC Accession Number:
- 3366272
- Digital Object Identifier :
- 10.1109/12.16505
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Feb. 1989
- Sponsored by :
- IEEE Computer Society
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