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A scalable and accurate simulation technique to be used for the computer-aided design (CAD) of matching networks employed within high-power RF transistors is presented. A novel measurement methodology is developed and utilized during the validation of the proposed analysis approach. Appropriate segmentation techniques were developed, which are consistent with the design approach of the high-power transistor, that take into account the overall complexity of the internal match of most modern RF high-power transistors, while preserving important electromagnetic interactions. By being able to properly decouple the linear portion of the overall packaged transistor model, an objective accuracy assessment via the comparison of measured versus simulated results of the internal matching network was accomplished. The level of accuracy obtained provides credence to the idea of a full CAD-driven design process of the internal match of high-power RF transistors.