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Cell Multiprocessor Communication Network: Built for Speed

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3 Author(s)
Kistler, M. ; IBM Austin Res. Lab., TX ; Perrone, M. ; Petrini, F.

Multicore designs promise various power-performance and area-performance benefits. But inadequate design of the on-chip communication network can deprive applications of these benefits. To illuminate this important point in multicore processor design, the authors analyze the cell processor's communication network, using a series of benchmarks involving various DMA traffic patterns and synchronization protocols

Published in:

Micro, IEEE  (Volume:26 ,  Issue: 3 )

Date of Publication:

May-June 2006

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