By Topic

A flexible technique for the automatic design of approximate string matching architectures

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Martinek, T. ; Fac. of Inf. Technol., Brno Univ. of Technol. ; Kofenek, J. ; Fucik, O. ; Lexa, M.

Systolic array architectures for approximate string matching play a significant role as hardware accelerators in biological applications. However, their wider use is limited by the lack of flexibility required by often variable tasks. In this respect, it is desirable to develop a procedure for automatic design and implementation of such accelerators to reach high performance and efficiency with as little human effort on the side of the designer as possible. This paper proposes the essential element of such procedure, a method for the calculation of generic systolic array parameters with respect to maximal performance and efficient resource utilization

Published in:

Design and Diagnostics of Electronic Circuits and systems, 2006 IEEE

Date of Conference:

18-21 April 2006