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MUMS–A Reconfigurable Microprocessor Architecture

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3 Author(s)
M. Faiman ; University of Illinois ; A. C. Weaver ; R. W. Catlin

The would-be microprocessor user is currently confronted with a large and increasing number of different devices, each characterized by a unique architecture, instruction set, and hardware conventions, and provided with a varying, usually small degree of software support. Consequently, microprocessor systems reflect to a major extent the hardware and software idiosyncracies of the specific microprocessor(s) they incorporate; any attempt to replace a microprocessor with a newer or improved type, however inexpensive, entails a major system redesign. The work described in this article–MUMS, for Modular-Unified-Microprocessor-System–is an ongoing research project to overcome these limitations, having a modular, standardized, and versatile structure that is nevertheless commensurate with the low cost of the microprocessors themselves. Basic to this idea is a relatively simple micro-bus (the MUMS bus) that carries generic signals only, and over which a microprocessor communicates with its environment. Each microprocessor and all other modules, whether memory or I/O devices, connect to the MUMS bus through simple interfaces that standardize to the bus protocol. Simplicity is retained by having one microprocessor per MUMS bus, but flexibility is provided by allowing for MUMS busses to connect through a communications unit for the purpose of interprocessor communication or shared resources, or both. By this technique MUMS can be used in a standalone configuration or in conjunction with other processors. The insertion of a new nicroprocessor requires only one new MUMS bus interface and an associated software utility package in a ROM module; the rest of the system is unmodified.

Published in:

Computer  (Volume:10 ,  Issue: 1 )