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A low-power 22-bit incremental ADC

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7 Author(s)
Quiquempoix, V. ; Microchip Technol. Inc, Chandler, AZ ; Deval, P. ; Barreto, A. ; Bellini, G.
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This paper describes a low-power 22-bit incremental ADC, including an on-chip digital filter and a low-noise/low-drift oscillator, realized in a 0.6-mum CMOS process. It incorporates a novel offset-cancellation scheme based on fractal sequences, a novel high-accuracy gain control circuit, and a novel reduced-complexity realization for the on-chip sinc filter. The measured output noise was 0.25 ppm (2.5 muVRMS), the DC offset 2 muV, the gain error 2 ppm, and the INL 4 ppm. The chip operates with a single 2.7-5 V supply, and draws only 120 muA current during conversion

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:41 ,  Issue: 7 )