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Measurement and modeling errors in noise parameters of scaled-CMOS devices

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3 Author(s)
G. Banerjee ; Intel Corp., Hillsboro, OR, USA ; K. Soumyanath ; D. J. Allstot

Noise parameter measurements of submicrometer scaled-CMOS devices are error prone. These errors can propagate to a device model affecting the performance of low-noise amplifiers (LNAs) designed with them. In this paper, measurement errors in noise parameters of submicrometer scaled-CMOS devices are quantified. The sensitivity of different noise parameters to measurement and modeling errors is examined, showing that some parameters (NFmin,Rn) are more immune to such errors than others (Gopt,Bopt). We propose a modeling and design approach (desensitization by Rn-optimization) that can greatly alleviate the impact of such errors on the noise figure of LNAs. Measured results from a 90-nm LNA show substantial (ges 2.5 dB) improvement in its noise figure as a result of desensitization

Published in:

IEEE Transactions on Microwave Theory and Techniques  (Volume:54 ,  Issue: 6 )