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Power Reduction Techniques for LSI Memory

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1 Author(s)
Greene, F.S. ; TECHNOLOGY LEARNING CORP.

Power reduction techniques are described for both LSI memory components and systems. These techniques have been verified experimentally for both read-only and random access read/write components using power switching circuits external to the chips. A number of ways to apply on-chip power switching are described. The power switching concept is also described for memory cards and systems that can be organized into blocks.

Published in:

Computer  (Volume:5 ,  Issue: 1 )