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A CMOS 9 bit 25 MHz 100 mW ADC for mixed analog/digital LSIs

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5 Author(s)

A 9-b, low-power, video A/D (analog-to-digital) converter has been fabricated in 1.3-μm CMOS technology. A novel configuration for the sampling circuit is proposed to realize high precision while keeping high-speed conversion over a 25-MHz rate. The fabricated chip has only 100-mW power consumption and a 2.0-mm×2.0-mm active area. This converter is useful in mixed analog/digital LSIs

Published in:

Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991

Date of Conference:

12-15 May 1991