Polysilicon interconnect high-frequency measurements (45 MHz to 2 GHz) and SPICE-based transmission-line modeling have been performed on CMOS IC test structures. The methodology consists of the following steps: (1) customized transmission-line layout for microwave coplanar probe-based test; (2) calibration of probe reference plane using the ISS (impedance-standard substrate) standard and the LRM (line-reflect-match) calibration technique; (3) calibration of silicon substrate pad-parasitics; (4) S-parameter measurement of transmission lines and subtraction of system and substrate parasitics; and (5) SPICE circuit model extraction and parameter optimization. Results from ongoing measurements of diffusion lines are also reported
Published in:
Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991
Date of Conference: 12-15 May 1991