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STI Gap-Fill Technology with High Aspect Ratio Process for 45nm CMOS and beyond

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9 Author(s)
Tilke, A.T. ; Infineon Technol., Hopewell Junction, NY ; Hampp, R. ; Stapelmann, C. ; Culmsee, M.
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In the present work the high aspect ratio process (HARP) using a new O3/TEOS based sub atmospheric chemical vapor deposition process was implemented as STI gap fill in sub-65nm CMOS. We prove good gap fill performance up to aspect ratios larger 10:1. Since this fill process doesn't attack the STI liners as compared to HDP, a variety of different STI liners can be implemented

Published in:

Advanced Semiconductor Manufacturing Conference, 2006. ASMC 2006. The 17th Annual SEMI/IEEE

Date of Conference:

22-24 May 2006