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Partially depleted CMOS SOI technology for low power RF applications

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9 Author(s)
Tinella, C. ; FTM, STMicroelectronics, Crolles, France ; Gianesello, F. ; Gloria, D. ; Raynaud, C.
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The low resistivity substrate that is used in bulk silicon processes (CMOS and BiCMOS) limits the integration of high-quality passives components and gives rise to severe substrate coupling issues. This paper shows how to take advantage of HR SOI to improve RF circuit performances as well as the effectiveness of HR SOI to reduce substrate coupling. Potentiality of mm-wave passive integration is also shown.

Published in:

Gallium Arsenide and Other Semiconductor Application Symposium, 2005. EGAAS 2005. European

Date of Conference:

3-4 Oct. 2005