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On-Chip Built-In Self-Test of Video-Rate ADCs Using a 1.5 V CMOS Gaussian Noise Generator

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3 Author(s)
Evans, G. ; Dept. Fisica, Faculdade de Ciências da Universidade de Lisboa, Edificio C8, Campo Grande, 1749-016 Lisboa, Portugal and CRI-UNINOVA, Faculdade de Ciências e Tecnologia, Campus da FCT/UNL, 2825-114 Caparica, Portugal e-mail: gevans@fc.ul.pt ; Goes, J. ; Paulino, N.

A new method to perform built-in self-testing of the linearity and noise of ADCs is proposed. The technique uses an integrated CMOS Gaussian noise source as input stimulus together with a simple algorithm based in pre-calculated ROM tables for the DNL/INL measurements. The measured results of the integrated low-voltage noise generator are described. The evaluation of the proposed algorithm is demonstrated through a commercial 10-bit, 4OMS/s ADC and compared with the conventional histogram method using sine waves as input signal. The simplicity of the noise generator and of the digital circuitry together with other advantages pointed-out, clearly demonstrate the attractiveness of the proposed technique.

Published in:

Electron Devices and Solid-State Circuits, 2005 IEEE Conference on

Date of Conference:

19-21 Dec. 2005