Impact of interface impurities on heterostructure field-effect transistors

The influence of C and Si impurities at the substrate/epitaxy interface on the threshold voltage of GaAs/AlGaAs selectively doped heterostructure transistors has been investigated both experimentally and theoretically using a one-dimensional simulation. The presence of C raises the conduction band relative to the Fermi level and reduces the electron density in the channel. This results in a positive shift of the depletion-mode (DFET) threshold voltage as the interfacial C concentration increases. For low C concentrations the DFET threshold voltage decreases with increasing Si at the interface. The impact of interfacial C and Si is small on the enhancement-mode (EFET) threshold voltage.<
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