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Hardware Acceleration for Finite Element Electromagnetics: Efficient Sparse Matrix Floating-Point Computations with Field Programmable Gate Arrays

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3 Author(s)
El Kurdi, Y. ; Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, Que. ; Gross, W.J. ; Giannacopoulos, D.

Custom hardware acceleration of electromagnetics computations leverages favorable industry trends, which indicate reconfigurable hardware devices such as field programmable gate arrays (FPGAs) may soon outperform general purpose CPUs. We present a new striping method for efficient sparse matrix-vector multiplication implemented in a deeply pipelined FPGA design. The effectiveness of the new method is illustrated for a representative set of finite element matrices

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Electromagnetic Field Computation, 2006 12th Biennial IEEE Conference on

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