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An asynchronous cellular logic network for trigger-wave image processing on fine-grain massively parallel arrays

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1 Author(s)
Dudek, P. ; Sch. of Electr. & Electron. Eng., Univ. of Manchester, UK

Massively parallel processor-per-pixel single-instruction multiple data arrays are being successfully used for early vision applications in smart sensor systems; however, they are inherently inefficient when executing algorithms involving propagation of binary signals, such as the geodesic reconstruction. Yet, these algorithms, at the interface between pixel-level and object-level image processing, should be implemented on the vision chip to facilitate data reduction at the sensor level. A cellular asynchronous network is presented in this paper, which can be used to execute binary propagation operations. The proposed circuit is optimized in terms of speed and power consumption. In 0.35-μm technology, the simulated propagation speed is 0.18 ns per pixel and the total energy expended per propagation is 0.37 pJ per cell. In this brief, implementation issues are discussed and simulation results including image processing examples are presented.

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:53 ,  Issue: 5 )