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Novel Buried Bitline Integration for compact Cell Design in High-Performance embedded Flash Memory with Deep Trench Isolation

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8 Author(s)
Tilke, A.T. ; Infineon Technol. North America, San Jose, CA ; Pescini, L. ; Stiftinger, M. ; Kakoschke, R.
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In this work, we present a novel buried BL (BBL) concept that links the source contacts of each individual BL via the isolated p-well; thus effectively eliminating one metal line per BL and reducing overall cell size. In comparison to the UCPE cell, a conservative cell size shrink of about 40% can be achieved from a standard embedded 21F2 DT-UCPE-cell. The schematic cell layout is shown and comparison to that of a conventional UCP-layout is presented

Published in:

Non-Volatile Semiconductor Memory Workshop, 2006. IEEE NVSMW 2006. 21st

Date of Conference:

12-16 Feb. 2006