By Topic

An efficient parallel IP lookup technique using CREW based multiprocessor organization

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
T. Srinivasan ; Dept. of Comput. Sci. & Eng., Sri Venkateswara Coll. of Eng., Sriperumbudur, India ; M. Sandhya ; N. Srikrishna

IP address lookup is a multifaceted problem because of increasing routing table sizes, increased traffic, higher speed links, and the migration to 128 bit IPv6 addresses. Routers bring into play the packet's destination address to determine for each packet the next hop. IP address lookup is complicated because it requires a longest matching prefix search. We propose a CREW based multiprocessor organization lookup (CMOL) that uses contemporaneous sorting and searching. This technique further uses N+1-ary search to speedup the address lookup operations. Since multiple processors are used, the prefixes to be compared are reduced for each processor. The number of comparisons for each processor is reduced by a factor of n/N. The time complexity of searching and sorting has been reduced to O(logN+1(N+1)). The use of controlled prefix expansion further reduces the storage space

Published in:

4th Annual Communication Networks and Services Research Conference (CNSR'06)

Date of Conference:

24-25 May 2006