Observation of suppressed interface state relaxation under positive gate biasing of the ultrathin oxynitride gate p-MOSFET subjected to negative-bias temperature stressing

The impact of a positive gate relaxation voltage on the recovery of an ultrathin oxynitride gate p-MOSFET subjected to negative-bias temperature stressing is investigated. Apart from reaffirming previous observations on the accelerated threshold voltage recovery due primarily to positive field-induced discharge of positive SiO/sub 2/ bulk states, the results also unambiguously show that the relaxation of Si/SiO/sub 2/ interface states (N/sub it/) is suppressed. The observed suppression of N/sub it/ relaxation poses an important challenge to the existing viewpoint of increased N/sub it/ relaxation under positive gate biasing.