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Observation of suppressed interface state relaxation under positive gate biasing of the ultrathin oxynitride gate p-MOSFET subjected to negative-bias temperature stressing

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1 Author(s)
Ang, D.S. ; Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore

The impact of a positive gate relaxation voltage on the recovery of an ultrathin oxynitride gate p-MOSFET subjected to negative-bias temperature stressing is investigated. Apart from reaffirming previous observations on the accelerated threshold voltage recovery due primarily to positive field-induced discharge of positive SiO2 bulk states, the results also unambiguously show that the relaxation of Si/SiO2 interface states (Nit) is suppressed. The observed suppression of Nit relaxation poses an important challenge to the existing viewpoint of increased Nit relaxation under positive gate biasing.

Published in:

Electron Device Letters, IEEE  (Volume:27 ,  Issue: 5 )

Date of Publication:

May 2006

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