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The combination of channel mobility-enhancement techniques such as strain engineering with nonclassical MOS device architectures, such as ultrathin-body (UTB) or double-gate structures, offers the promise of maximizing current drive while maintaining the electrostatic control required for aggressive device scaling in future technology nodes. The tradeoff between transport enhancement and OFF-state leakage current is compared experimentally for UTB MOSFETs in two types of materials: 1) strained Si directly on insulator (SSDOI) and 2) strained Si/strained Si1-zGez (z=0.46-0.55)/strained Si heterostructure-on-insulator (HOI). SSDOI of moderate strain level (e.g. ∼ 0.8%) yields high electron-mobility enhancements for all electron densities, while high strain levels (e.g. ∼ 1.6%) are required to obtain hole-mobility enhancements at high inversion charge densities. HOI is demonstrated to have similar electron-mobility characteristics to SSDOI, while hole mobilities are improved and can be maintained at high inversion charge densities. Hole mobility in strained channels with thickness below 10 nm is studied and compared for SSDOI and HOI. As the channel thickness is reduced, mobility decreases, as in unstrained silicon-on-insulator (SOI), though hole-mobility enhancements are demonstrated into the ultrathin-channel regime. Increased OFF-state leakage currents are observed in HOI compared to SSDOI and SOI. For a 4-nm-thick buried SiGe layer, leakage is reduced relative to devices with thicker SiGe channels.