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Concurrent detection of erroneous responses in linear analog circuits

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2 Author(s)
Stratigopoulos, H.-G.D. ; Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA ; Makris, Y.

This paper presents a novel methodology for concurrent error detection in linear analog circuits. The error-detection circuit monitors the input and some observable internal nodes of the examined circuit and generates an estimate of its output. The estimate coincides with the output in error-free operation, while in the presence of errors, it diverges. Thus, concurrent error detection is performed by comparing the two signals through an analog comparator. In essence, the error-detection circuit operates as a duplicate of the examined circuit, yet it is smaller, in general, and never exceeds the size of an actual duplicate. The proposed methodology is demonstrated on three analog filters.

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:25 ,  Issue: 5 )