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A simple on-chip repetitive sampling setup for the quantification of substrate noise

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4 Author(s)
De Wilde, M. ; Dept. of Electron. & Inf. Syst., Ghent Univ., Gent, Belgium ; Meeus, W. ; Rombouts, P. ; Van Campenhout, J.

The quantification of substrate noise is an important issue in mixed-signal designs, where sensitive analog circuits are embedded in a hostile digital environment. In this paper we present an experimental environment to characterize the sensitivity of embedded analog circuits to digitally generated substrate noise. Our measurement technique is based on equivalent-time substrate voltage sampling and uses a simple differential latch comparator without explicit input sample-and-hold. A surprisingly large measurement bandwidth is observed,which is explained from the detailed circuit behavior. On our 0.18-μm CMOS test chip,we have demonstrated that our system allows to wave trace pulses as narrow as 200 ps accurately. Additionally, the extraction of precise measurement data from observations that are excessively corrupted by additive noise and timing jitter is addressed. We present simple yet very effective methods to accurately reconstruct pulse waveform features without the use of delicate deconvolution operations.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:41 ,  Issue: 5 )

Date of Publication:

May 2006

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