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Synergistic Processing in Cell's Multicore Architecture

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6 Author(s)
Gschwind, M. ; IBM Thomas J. Watson Res. Center, NY ; Hofstee, H.P. ; Flachs, B. ; Hopkin, M.
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Eight synergistic processor units enable the Cell Broadband Engine's breakthrough performance. The SPU architecture implements a novel, pervasively data-parallel architecture combining scalar and SIMD processing on a wide data path. A large number of SPUs per chip provide high thread-level parallelism. The streamlined architecture provides an efficient multithreaded execution environment for both scalar and SIMD threads and represents a reaffirmation of the RISC principles of combining leading edge architecture and compiler optimizations. These design decisions have enabled the Cell BE to deliver unprecedented supercomputer-class compute power for consumer applications

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Micro, IEEE  (Volume:26 ,  Issue: 2 )