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If there is a technique to manipulate the electrical components to achieve higher speed circuitry design, there should be a technique to access and debug the components reside in the circuitry as well. The current-resistance (I/R) analysis is the one. This paper introduces the debugging methodology used in performing failure analysis and fault isolation for 90-nanometer technology gigabit at-speed functional failure. Current-resistance (I/R) analysis is the exact approach to tackle the challenge of debugging the performance of gigabit high-speed signal due to the fluctuation characteristic of the passive components. Accurate result was obtained with the aid of SQUID equipment.
Date of Conference: 7-9 Dec. 2004