A system is presented for exploiting restricted-and-parallelism (RAP) in logic programs on a distributed (nonshared memory) architecture. The system uses global compilation techniques and is designed using the new generation of transputers (H1/C104). Externally, the system behaves as a sequential one, in which, the solutions are always produced according to the depth-first strategy
Published in:
Electrotechnical Conference, 1991. Proceedings., 6th Mediterranean
Date of Conference: 22-24 May 1991