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Memory management unit-a new principle for LRU implementation

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2 Author(s)
Stefan, G. ; Fac. of Electron., Polytech. Inst., Bucharest, Romania ; Draghici, F.

A new principle is presented for a memory management unit (MMU) which contains a new circuit for LRU (least recently used) implementation. A MMU has been chosen for study. It works with a 24-b address processor for which it facilitates access to a virtual memory (VM) of 16 Mwords, available on a disk, through the assistance of a paginated dynamic primary memory (PM) of 1 Mword, which keeps the most recently used (MRU) pages

Published in:

Electrotechnical Conference, 1991. Proceedings., 6th Mediterranean

Date of Conference:

22-24 May 1991