Referenced Items are not available for this document.
A new principle is presented for a memory management unit (MMU) which contains a new circuit for LRU (least recently used) implementation. A MMU has been chosen for study. It works with a 24-b address processor for which it facilitates access to a virtual memory (VM) of 16 Mwords, available on a disk, through the assistance of a paginated dynamic primary memory (PM) of 1 Mword, which keeps the most recently used (MRU) pages
Published in:
Electrotechnical Conference, 1991. Proceedings., 6th Mediterranean
Date of Conference: 22-24 May 1991
- Page(s):
- 989 - 992 vol.2
- Meeting Date :
- 22 May 1991-24 May 1991
- Print ISBN:
- 0-87942-655-1
- INSPEC Accession Number:
- 4198762
- Conference Location :
- LJubljana
- Digital Object Identifier :
- 10.1109/MELCON.1991.162008
- Product Type:
- Conference Publications
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