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This paper describes the design considerations of a 2.4 GHz CMOS voltage-controlled oscillator (VCO) with two tuning inputs when used in a wideband GFSK-modulated frequency synthesizer based on a two-point delta-sigma modulation (TPDSM) architecture. One tuning input is provided mainly for the fractional-TV frequency synthesis, and the other one is for the direct GFSK modulation. In the VCO design, the tuning sensitivity for GFSK modulation is optimized including the effects of digital-to-analog converter (DAC). In addition, the size of spiral inductor in the LC tank is minimized without the cost of reducing quality (Q) factor. The implemented TPDSM-based GFSK-modulated frequency synthesizer can achieve a maximum data rate of up to 2.5 Mbps with an FSK error less than 1.4% and a phase-locked loop (PLL) settling time less than 110 μs. The modulated frequency synthesizer with such good performances has promising application potential in a low-power solution for the enhanced data rate (EDR) Bluetooth transmitters.